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TDA7375
2 x 35W DUAL/QUAD POWER AMPLIFIER FOR CAR RADIO
HIGH OUTPUT POWER CAPABILITY: 2 x 40W max./4 2 x 35W/4 EIAJ 2 x 35W/4 EIAJ 2 x 25W/4 @14.4V, 1KHz, 10% 4 x 7W/4 @14.4V, 1KHz, 10% 4 x 12W/2 @14.4V, 1KHz, 10% MINIMUM EXTERNAL COMPONENTS COUNT: - NO BOOTSTRAP CAPACITORS - NO BOUCHEROT CELLS - INTERNALLY FIXED GAIN (26dB BTL) ST-BY FUNCTION (CMOS COMPATIBLE) NOAUDIBLE POPDURING ST-BYOPERATIONS DIAGNOSTICS FACILITY FOR: - CLIPPING - OUT TO GND SHORT - OUT TO VS SHORT - SOFT SHORT AT TURN-ON - THERMAL SHUTDOWN PROXIMITY Protections: OUPUT AC/DC SHORT CIRCUIT BLOCK DIAGRAM
MULTIWATT15V
MULTIWATT15H
ORDERING NUMBERS: TDA7375V TDA7375H
- TO GND - TO VS - ACROSS THE LOAD SOFT SHORT AT TURN-ON OVERRATING CHIP TEMPERATURE WITH SOFT THERMAL LIMITER LOAD DUMP VOLTAGE SURGE VERY INDUCTIVE LOADS FORTUITOUS OPEN GND REVERSED BATTERY ESD
DIAGNOSTICS
September 1998
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TDA7375
DESCRIPTION The TDA7375 is a new technology class AB car radio amplifier able to work either in DUAL BRIDGE or QUAD SINGLE ENDED configuration. The exclusive fully complementary structure of the output stage and the internally fixed gain guaranABSOLUTE MAXIMUM RATINGS
Symbol Vop VS Vpeak IO IO Ptot Tstg, Tj Operating Supply Voltage DC Supply Voltage Peak Supply Voltage (for t = 50ms) Output Peak Current (not repetitive t = 100s) Output Peak Current (repetitive f > 10Hz) Power Dissipation (Tcase = 85C) Storage and Junction Temperature Parameter Value 18 28 50 4.5 3.5 36 -40 to 150 Unit V V V A A W C
tees the highest possible power performances with extremely reduced component count. The on-board clip detector simplifies gain compression operation. The fault diagnostics makes it possible to detect mistakes during car radio set assembly and wiring in the car. GENERAL STRUCTURE
THERMAL DATA
Symbol Rth j-case Description Thermal Resistance Junction-case Max Value 1.8 Unit C/W
PIN CONNECTION (Top view)
DIAGNOSTICS
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TDA7375
ELECTRICAL CHARACTERISTICS (Refer to the test circuit, VS = 14.4V; RL = 4; f = 1KHz; T amb = 25C, unless otherwise specified
Symbol VS Id VOS PO Parameter Supply Voltage Range Total Quiescent Drain Current Output Offset Voltage Output Power THD = 10%; RL = 4 Bridge Single Ended Single Ended, RL = 2 VS = 14.4V, Bridge VS = 13.7V, Bridge R L = 4 Single Ended, PO = 0.1 to 4W Bridge, PO = 0.1 to 10W f = 1KHz Single Ended f = 10KHz Single Ended f = 1KHz Bridge f = 10KHz Bridge R IN GV GV EIN Input Impedance Voltage Gain Voltage Gain Match Input Noise Voltage R g = 0; "A" weighted, S.E. Non Inverting Channels Inverting Channels Bridge Rg = 0; 22Hz to 22KHz SVR A SB ISB V SB V SB Ipin7 Supply Voltage Rejection Stand-by Attenuation ST-BY Current Consumption ST-BY In Threshold Voltage ST-BY Out Threshold Voltage ST-BY Pin Current Play Mode V pin7 = 5V Max Driving Current Under Fault (*) Icd off Icd on Vsat pin10 Clipping Detector Output Average Current Clipping Detector Output Average Current Voltage Saturation on pin 10 d = 1% (**) d = 5% (**) Sink Current at Pin 10 = 1mA 90 160 0.7 3.5 50 5 R g = 0; f = 300Hz PO = 1W VST-BY = 0 to 1.5V 50 80 90 100 1.5 2 5 3.5 Single Ended Bridge Single Ended Bridge 55 60 20 10 19 25 30 15 20 26 21 27 0.5 23 6.5 36 32 25 7 12 40 35 0.02 0.03 70 60 RL = Test Condition Min. 8 Typ. Max. 18 150 150 Unit V mA mV W W W W W % % dB dB dB dB K K dB dB dB V V V dB dB A V V A mA A A V
PO max PO EIAJ THD
Max. Output Power (***) EIAJ Output Power (***) Distortion
0.3
CT
Cross Talk
(*) See built-in S/C protection description (**) Pin 10 Pulled-up to 5V with 10K; RL = 4 (***) Saturated square wave output.
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TDA7375
STANDARD TEST AND APPLICATION CIRCUIT Figure 1: Quad Stereo
10K R1 ST-BY C7 10F IN FL C1 0.22F IN FR C2 0.22F IN RL C4 0.22F IN RR 11 C3 0.22F 6 C8 47F 8 9 14 10 C12 2200F
D94AU063A
C6 100nF 7 13 3 1
VS C5 1000F
4
C10 2200F 5 2 C9 2200F 15 C11 2200F
OUT FL
12
OUT FR
OUT RL
Note: C9, C10, C11, C12 could be reduced if the 2 operation is not required.
OUT RR
DIAGNOSTICS
Figure 2: Double Bridge
10K R1 ST-BY C5 10F IN L C1 0.47F IN R C2 0.47F 4 5 12 11 6 C8 47F 8 9 10 DIAGNOSTICS
D94AU064A
C4 100nF 7 13 3 1
VS C3 1000F
OUT L 2 15 OUT R 14
Figure 3: Stereo/Bridge
10K ST-BY 10F 7 13 3 100nF VS 1000F
IN L 0.22F IN L 0.22F IN BRIDGE 0.47F
4
1 2200F
OUT L
5
2 2200F
OUT R
12 11 6 47F 8 9 10
15 OUT BRIDGE 14
DIAGNOSTICS
D94AU065A
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TDA7375
Figure 4: P.C. Board and Component Layout of the fig.1 (1:1 scale).
Figure 5: P.C. Board and Component Layout of the fig.2 (1:1 scale).
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TDA7375
Figure 6: Quiescent Drain Current vs. Supply Voltage (Single Ended and Bridge). Figure 7: Quiescent Output Voltage vs. Supply Voltage (Single Ended and Bridge).
RL = 4 Vi = 0
RL = 4 Vi = 0
Figure 8: Output Power vs. Supply Voltage
Figure 9: Output Power vs. Supply Voltage
S.E. RL = 2 f = 1KHz
S.E. RL = 4 f = 1KHz
Figure 10: Output Power vs. Supply Voltage
Figure 11: Distortion vs. Output Power
BTL RL = 4 f = 1KHz
S.E. VS = 14.4V RL = 2
f = 15KHz
f = 1KHz
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TDA7375
Figure 12: Distortion vs. Output Power Figure 13: Distortion vs. Output Power
S.E. VS = 14.4V RL = 4 f = 15KHz f = 15KHz
f = 1KHz f = 1KHz
BTL VS = 14.4V RL = 4
Figure 14: Cross-talk vs. Frequency
Figure 15: Supply Voltage Rejection vs. Frequency
S.E. VS = 14.4V RL = 4 Rg = 10
BTL Rg = 0 CSVR = 47F Vripple = 1Vrms
Figure 16: SupplyVoltage Rejection vs. Frequency
Figure 17: Stand-byAttenuation vs. Threshold Voltage
S.E. Rg = 0 CSVR = 47F Vripple = 1Vrms
BTL & S.E. VS = 14.4V RL = 4 0 dB = 1W
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TDA7375
Figure 18: Total Power Dissipation and Efficiency vs. Output Power Figure 19: Total Power Dissipation and Efficiency vs. Output Power.
Ptot
S.E. VS = 14.4V RL = 4 x 4 f = 1KHz
Ptot BTL VS = 14.4V RL = 2 x 4 f = 1KHz
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TDA7375
High Application Flexibility The availability of 4 independent channels makes it possible to accomplish several kinds of applications ranging from 4 speakers stereo (F/R) to 2 speakers bridge solutions. In case of working in single ended conditions the polarity of the speakers driven by the inverting amplifier must be reversed respect to those driven by non inverting channels. This is to avoid phase inconveniences causing sound alterations especially during the reproduction of low frequencies. Easy Single Ended to Bridge Transition The change from single ended to bridge configurations is made simply by means of a short circuit across the inputs, that is no need of further external components. Gain Internally Fixed to 20dB in Single Ended, 26dB in Bridge Advantages of this design choice are in terms of: components and space saving output noise, supply voltage rejection and distortion optimization. Silent Turn On/Off and Muting/Stand-by Function The stand-by can be easily activated by means of a CMOS level applied to pin 7 through a RC filter. Under stand-by condition the device is turned off completely (supply current = 1A typ.; output attenuation= 80dB min.). Every ON/OFF operation is virtually pop free. Furthemore, at turn-on the device stays in muting condition for a time determined by the value assigned to the SVR capacitor. While in muting the device outputs becomes insensitive to any kinds of signal that may be present at the input terminals. In other words every transient coming from previous stages produces no unplesant acoustic effect to the speakers. STAND-BY DRIVING (pin 7) Some precautions have to be taken in the definition of stand-by driving networks: pin 7 cannot be directly driven by a voltage source whose current capability is higher than 5mA. In practical cases a series resistance has always to be inserted, having it the double purpose of limiting the current at pin 7 and to smooth down the stand-by ON/OFF transitions - in combination with a capacitor - for output pop prevention. In any case, a capacitor of at least 100nF from pin 7 to S-GND, with no resistance in between, is necessary to ensure correct turn-on. OUTPUT STAGE The fully complementary output stage was made possible by the development of a new component: the ST exclusive power ICV PNP. A novel design based upon the connection shown in fig. 20 has then allowed the full exploitation of its possibilities. The clear advantages this new approach has over classical output stages are as follows:
Rail-to-Rail Output Voltage Swing With No Need of Bootstrap Capacitors. The output swing is limited only by the VCEsat of the output transistors, which is in the range of 0.3 (Rsat) each. Classical solutions adopting composite PNPNPN for the upper output stage have higher saturation loss on the top side of the waveform. This unbalanced saturation causes a significant power reduction. The only way to recover power consists of the addition of expensive bootstrap capacitors. Absolute Stability Without Any External Compensation. Referring to the circuit of fig. 20 the gain VOut/VIn is greater than unity, approximately 1+ R2/R1. The DC output (VCC/2) is fixed by an auxiliary amplifier common to all the channels. By controlling the amount of this local feedback it is possible to force the loop gain (A*) to less than unity at frequency for which the phase shift is 180. This means that the output buffer is intrinsically stable and not prone to oscillation. Most remarkably, the above feature has been achieved in spite of the very low closed loop gain of the amplifier. In contrast, with the classical PNP-NPN stage, the solution adopted for reducing the gain at high frequencies makes use of external RC networks, namely the Boucherot cells. BUILT-IN SHORT CIRCUIT PROTECTION Figure 20: The New Output Stage
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TDA7375
Reliable and safe operation, in presence of all kinds of short circuit involving the outputs is assured by BUILT-IN protectors. Additionally to the AC/DC short circuit to GND, to VS, across the speaker, a SOFT SHORT condition is signalled out during the TURN-ON PHASE so assuring correct operation for the device itself and for the loudspeaker. This particular kind of protection acts in a way to avoid that the device is turned on (by ST-BY) when a resistive path (less than 16 ohms) is present between the output and GND. As the involved circuitry is normally disabled when a current higher than 5mA is flowing into the ST-BY pin, it is important, in order not to disable it, to have the external current source driving the STBY pin limited to 5mA. This extra function becomes particularly attractive when, in the single ended configuration, one capacitor is shared between two outputs (see fig. 21). Figure 21. Figure 22: Clipping Detection Waveforms
A current sinking at pin 10 is triggered when a certain distortion level is reached at any of the outputs. This function allows gain compression possibility whenever the amplifier is overdriven. Thermal Shutdown In this case the output 10 will signal the proximity of the junction temperature to the shutdown threshold. Typically current sinking at pin 10 will start ~10C before the shutdown threshold is reached. HANDLING OF THE DIAGNOSTICS INFORMAFigure 23: Output Fault Waveforms (see fig. 24)
Supposing that the output capacitor C out for any reason is shorted, the loudspeaker will not be damaged being this soft short circuit condition revealed. Diagnostics Facility The TDA7375 is equipped with a diagnostic circuitry able to detect the following events: Clipping in the output signal Thermal shutdown Output fault: - short to GND - short to VS - soft short at turn on The information is available across an open collector output (pin 10) through a current sinking when the event is detected
TDA7375
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TDA7375
Figure 24: Fault Waveforms
ST-BY PIN VOLTAGE 2V t OUT TO Vs SHORT OUTPUT WAVEFORM SOFT SHORT t OUT TO GND SHORT
Vpin 10
CORRECT TURN-ON FAULT DETECTION t CHECK AT TURN-ON (TEST PHASE)
D94AU149A
SHORT TO GND OR TO Vs
TION As various kinds of information is available at the same pin (clipping detection, output fault, thermal proximity), this signal must be handled properly in Figure 25: Waveforms
order to discriminate each event. This could be done by taking into account the different timing of the diagnostic output during each case.
ST-BY PIN VOLTAGE
t
Vs OUTPUT WAVEFORM t
Vpin 10 WAVEFORM t CLIPPING
D94AU150
SHORT TO GND OR TO Vs
THERMAL PROXIMITY
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TDA7375
Normally the clip detector signalling produces a low level at pin 10 that is shorter than that present under faulty conditions; based on this assumption Figure 26. an interface circuitry to differentiate the information is represented in the schematic of fig. 26.
TDA7375
PCB-LAYOUT GROUNDING (general rules) The device has 2 distinct ground leads, P-GND (POWER GROUND) and S-GND (SIGNAL GROUND) which are practically disconnected from each other at chip level. Proper operation requires that P-GND and S-GND leads be connected together on the PCB-layout by means of reasonably low-resistance tracks. As for the PCB-ground configuration, a star-like arrangement whose center is represented by the supply-filtering electrolytic capacitor ground is highly advisable. In such context, at least 2 separate paths have to be provided, one for P-GND and one for S-GND. The correct ground assign-
ments are as follows: STANDBY CAPACITOR, pin 7 (or any other standby driving networks): on S-GND SVR CAPACITOR (pin 6): on S-GND and to be placed as close as possible to the device. INPUT SIGNAL GROUND (from active/passive signal processor stages): on S-GND. SUPPLY FILTERING CAPACITORS (pins 3,13): on P-GND. The (-) terminal of the electrolytic capacitor has to be directly tied to the battery (-) line and this should represent the starting point for all the ground paths.
12/15
TDA7375
mm MIN. TYP. MAX. 5 2.65 1.6 1 0.49 0.66 1.02 17.53 19.6 21.9 21.7 17.65 17.25 10.3 2.65 4.25 4.63 1.9 1.9 3.65 17.5 10.7 4.55 5.08 22.2 22.1 20.2 22.5 22.5 18.1 17.75 10.9 2.9 4.85 5.53 2.6 2.6 3.85 1.27 17.78 0.55 0.75 1.52 18.03 0.019 0.026 0.040 0.690 0.772 0.862 0.854 0.695 0.679 0.406 0.104 0.167 0.182 0.075 0.075 0.144 0.689 0.421 0.179 0.200 0.874 0.870 0.795 0.886 0.886 0.713 0.699 0.429 0.114 0.191 0.218 0.102 0.102 0.152 0.050 0.700 0.039 0.022 0.030 0.060 0.710 MIN. inch TYP. MAX. 0.197 0.104 0.063
DIM. A B C D E F G G1 H1 H2 L L1 L2 L3 L4 L7 M M1 S S1 Dia1
OUTLINE AND MECHANICAL DATA
Multiwatt15 V
13/15
TDA7375
DIM. MIN. A B C E F G G1 H1 H2 L L1 L2 L3 L4 L5 L6 L7 S S1 Dia1 2.65 1.9 1.9 3.65 17.25 10.3 20.57 18.03 2.54 17.5 10.7 5.28 2.38 2.9 2.6 2.6 3.85 0.104 0.075 0.075 0.144 17.75 10.9 0.679 0.406 0.49 0.66 1.14 17.57 19.6 20.2 0.810 0.710 0.100 0.689 0.421 0.208 0.094 0.114 0.102 0.102 0.152 0.699 0.429 1.27 17.78 mm TYP. MAX. 5 2.65 1.6 0.55 0.75 1.4 17.91 0.019 0.026 0.045 0.692 0.772 0.795 0.050 0.700 MIN. inch TYP. MAX. 0.197 0.104 0.063 0.022 0.030 0.055 0.705
OUTLINE AND MECHANICAL DATA
Multiwatt15 H
14/15
TDA7375
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics MULTIWATT (R) is a Registered Trademark of the STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com
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